A 104.76-TOPS/W, Spike-Based Convolutional Neural Network Accelerator with Reduced On-Chip Memory Data Flow and Operation Unit Skipping.
Ping-Li HuangChen-Han HsuYu-Hsiang ChengZhaofang LiYu-Hsuan LinKea-Tiong TangPublished in: APCCAS (2022)
Keyphrases
- data flow
- convolutional neural network
- data transfer
- control flow
- database machine
- face detection
- systolic array
- random access memory
- compute intensive
- digital signal processing
- object oriented software
- high speed
- memory subsystem
- power dissipation
- digital circuits
- object oriented
- neural network
- multithreading
- memory management
- parallel implementation
- memory access
- signal processing
- spiking neurons
- level parallelism
- object recognition
- face recognition
- computer vision
- machine learning