A 264-to-287GHz, -2.5dBm Output Power, and -92dBc/Hz 1MHz-Phase-Noise CMOS Signal Source Adopting a 75fsrms Jitter D-Band Cascaded Sub-Sampling PLL.
Byeong-Taek MoonSang-Gug LeeJaehyouk ChoiPublished in: ISSCC (2023)
Keyphrases
- frequency band
- high frequency
- high speed
- band limited
- power consumption
- low frequency
- frequency spectrum
- radio frequency
- power supply
- clock frequency
- low power
- duty cycle
- nm technology
- compressive sampling
- cmos technology
- wavelet packet
- multi band
- compressive sensing
- subband
- frame rate
- power dissipation
- power quality
- wavelet transform
- power management
- random sampling
- frequency response
- frequency domain
- wavelet coefficients
- patch antenna
- packet loss
- control signals
- signal processing
- sampled data
- low voltage
- power distribution
- face detection
- impulse response
- dual band
- transfer function
- chip design
- parallel processing