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Automatic methodology for placing the guard rings into chip layout to prevent latchup in CMOS IC's.
Ming-Dou Ker
Hsin-Chin Jiang
Jeng-Jie Peng
Tzay-Luen Shieh
Published in:
ICECS (2001)
Keyphrases
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analog vlsi
high speed
low cost
circuit design
single chip
cmos image sensor
low power
cmos technology
image sensor
focal plane
power consumption
semi automatic
fully automatic
high density
website
printed circuit boards
programmable logic
mixed signal
ultra low power