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Design of a package for a high-speed processor made with yield-limited technology.
Atul Garg
James Loy
Hans J. Greub
John F. McDonald
Published in:
Great Lakes Symposium on VLSI (1994)
Keyphrases
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high speed
case study
low power
participatory design
gate array
design process
human factors
current status
user interface
high end
neural network
rapid development
single chip