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Novel Fuse Scheme with a Short Repair Time to Maximize Good Chips per Wafer in Advanced SoCs.

Chizu MatsumotoYuichi HamamuraMichinobu NakaoKaname YamasakiYoshikazu SaitoShun'ichi Kaneko
Published in: IEICE Trans. Electron. (2013)
Keyphrases
  • integrated circuit
  • high speed
  • recognition scheme
  • databases
  • learning scheme
  • database
  • real time
  • wavelet transform
  • high density