An energy-efficient temporal encoding circuit technique for on-chip high performance buses.
Qingli ZhangJinxiang WangYizheng YePublished in: ACM Great Lakes Symposium on VLSI (2006)
Keyphrases
- high speed
- analog vlsi
- circuit design
- evolvable hardware
- spatial and temporal
- chip design
- temporal data
- spatio temporal
- temporal information
- cmos technology
- low cost
- power dissipation
- wireless sensor networks
- temporal constraints
- sensor networks
- signal processor
- energy efficient
- phase locked loop
- low power consumption
- temporal databases
- temporal reasoning
- digital circuits
- encoding scheme
- energy efficiency
- low power
- evolutionary algorithm
- printed circuit boards
- public transport
- analog circuits
- temporal patterns
- sigma delta
- real time