A preactivating mechanism for a VT-CMOS cache using address prediction.

Ryo Fujioka Kiyokazu Katayama Ryotaro Kobayashi Hideki Ando Toshio Shimada

Published in: ISLPED (2002)

Keyphrases

prediction accuracy
prediction model
computational model
prefetching
real time
prediction algorithm
power consumption
image sensor
selection mechanism
power supply
cache management