CS-CMOS: A Low-Noise Logic Family for Mixed Signal SoCs.
Ajay TapariaBhaskar BanerjeeThayamkulangara R. ViswanathanPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2011)
Keyphrases
- mixed signal
- vlsi circuits
- digital circuits
- low power
- multi channel
- high noise
- delay insensitive
- cmos technology
- low signal to noise ratio
- low cost
- high speed
- signal to noise ratio
- power consumption
- low voltage
- computer science
- analog to digital converter
- multi valued
- modal logic
- single chip
- random access memory
- missing data
- circuit design
- finite state machines