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A 6-ns, 1.5-V, 4-Mb BiCMOS SRAM.
Hideo Toyoshima
Shigeru Kuhara
Koichi Takeda
Kazuyuki Nakamura
Hiloshi Okamura
Masahide Takada
Hisamitsu Suzuki
Hiroshi Yoshida
Tohru Yamazaki
Published in:
IEEE J. Solid State Circuits (1996)
Keyphrases
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power consumption
data transmission
network simulator
times faster
low power
routing protocol
end to end delay
random access memory
wireless sensor networks
inter frame
mixed signal
low cost
macroblock
ad hoc networks
data sets
higher throughput