Design Techniques for Gate-Leakage Reduction in CMOS Circuits.
Rafik S. GuindiFarid N. NajmPublished in: ISQED (2003)
Keyphrases
- cmos technology
- circuit design
- case study
- low power
- high speed
- analog vlsi
- design process
- logic synthesis
- delay insensitive
- power reduction
- data sets
- digital circuits
- vlsi circuits
- random access memory
- mixed signal
- multiple input
- digital signal processing
- physical design
- single chip
- engineering design
- embedded systems
- image processing