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Multi-cell soft errors at the 16-nm FinFET technology node.
N. Tam
Bharat L. Bhuva
Lloyd W. Massengill
D. Ball
Michael W. McCurdy
Michael L. Alles
Indranil Chatterjee
Published in:
IRPS (2015)
Keyphrases
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cost effective
rapid development
real time
case study
three dimensional
bayesian networks
data processing
directed graph
graph structure
cmos technology
information technology
high resolution
key technologies
st century
error analysis
nm technology