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5.6 Adaptive clocking system for improved power efficiency in a 28nm x86-64 microprocessor.
Aaron Grenat
Sanjay Pant
Ravinder Rachala
Samuel Naffziger
Published in:
ISSCC (2014)
Keyphrases
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circuit design
silicon on insulator
high speed
ibm power processor
neural network
data driven
computational efficiency
improved algorithm
power allocation
databases
website
power consumption
adaptive systems
chip design