Low-power decimation filters for oversampling ADCs via the decorrelating (DECOR) transform.
Dongwon SeoNaresh R. ShanbhagMilton FengPublished in: ISCAS (2000)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- low pass filter
- single chip
- hartley transform
- high power
- wireless transmission
- logic circuits
- digital signal processing
- low power consumption
- vlsi architecture
- cmos technology
- vlsi circuits
- power reduction
- image quality
- gate array
- fir filters
- signal processor
- power dissipation
- edge detection