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Logic Gates as Repeaters (LGR) for Timing Optimization of SoC Interconnects.
Arkadiy Morgenshtein
Michael Moreinis
Israel A. Wagner
Avinoam Kolodny
Published in:
VLSI-SOC (2003)
Keyphrases
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asynchronous circuits
optimization algorithm
optimization problems
logic programming
logic circuits
global optimization
database systems
low power
neural network
data sets
multi agent systems
low cost
real time
information systems
input output
optimization method
learning algorithm
modal logic