An Always-On 3.8 $\mu$ J/86% CIFAR-10 Mixed-Signal Binary CNN Processor With All Memory on Chip in 28-nm CMOS.
Daniel BankmanLita YangBert MoonsMarian VerhelstBoris MurmannPublished in: IEEE J. Solid State Circuits (2019)
Keyphrases
- mixed signal
- cmos technology
- low power
- embedded dram
- low voltage
- random access memory
- vlsi circuits
- high speed
- parallel processing
- power dissipation
- single chip
- nm technology
- power consumption
- analog to digital converter
- clock frequency
- multi channel
- chip design
- image sensor
- silicon on insulator
- dynamic random access memory
- low cost
- processor core
- memory management
- level parallelism
- cmos image sensor
- processing elements
- memory access
- digital signal processing
- memory subsystem
- real time
- multithreading
- digital circuits
- hardware and software
- main memory