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Multi-Stripline Redistribution Layer Interposer Channel Design for High Bandwidth Memory Module Considering Via Interconnect.
Jiwon Yoon
Hyunwoo Kim
Boogyo Sim
Hyunwook Park
Yi-Gyeong Kim
Sujin Park
Youngsu Kwon
Joungho Kim
Published in:
ISOCC (2023)
Keyphrases
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high bandwidth
high speed
parallel algorithm
high density