Hardware architecture for a general regression neural network coprocessor.
Jesús LázaroJagoba AriasArmando AstarloaUnai BidarteAitzol ZuloagaPublished in: Neurocomputing (2007)
Keyphrases
- hardware architecture
- general regression neural network
- hardware implementation
- dedicated hardware
- neural network
- massively parallel
- hardware architectures
- field programmable gate array
- distributed computing
- signal processing
- associative memory
- processing elements
- instruction set
- block matching motion estimation
- feature extraction
- xilinx virtex
- computer vision
- genetic algorithm