Power and EM SCA Resilience in 65nm AES-256 Exploiting Clock-Slew Dependent Variability in CMOS Digital Circuits.
Archisman GhoshMd. Abdur RahmanDebayan DasSantosh GhoshShreyas SenPublished in: CICC (2023)
Keyphrases
- digital circuits
- power consumption
- nm technology
- cmos technology
- circuit design
- low power
- silicon on insulator
- power management
- clock gating
- power reduction
- high speed
- power dissipation
- data flow
- finite state machines
- mixed signal
- expectation maximization
- evolvable hardware
- model based diagnosis
- maximum likelihood
- probabilistic model
- duty cycle
- em algorithm
- database
- ibm power processor
- ultra low power
- functional decomposition
- low voltage
- secret key
- low cost
- search algorithm