Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits.
Safa BerrimaYves BlaquièreYvon SavariaPublished in: Integr. (2018)
Keyphrases
- integrated circuit
- worst case
- low cost
- theoretical analysis
- learning algorithm
- computational complexity
- orders of magnitude
- bayesian networks
- data structure
- significant improvement
- computational cost
- computationally efficient
- machine learning algorithms
- fault diagnosis
- image processing algorithms
- interconnection networks