Statistical timing verification for transparently latched circuits.
Ruiming ChenHai ZhouPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2006)
Keyphrases
- asynchronous circuits
- delay insensitive
- data driven
- model checking
- high speed
- signature verification
- web services
- case study
- statistical analysis
- information theoretic
- hypothesis testing
- statistical approaches
- statistical significance
- false acceptance
- logic synthesis
- quantum computing
- statistical data
- statistical inference
- face verification
- real time
- statistical tests
- statistical models
- real world