Analysis and design of high-speed and low-power CMOS PLAs.
Jinn-Shyan WangChing-Rong ChangChingwei YehPublished in: IEEE J. Solid State Circuits (2001)
Keyphrases
- low power
- high speed
- single chip
- power consumption
- low cost
- low power consumption
- vlsi architecture
- cmos technology
- digital signal processing
- logic circuits
- gate array
- mixed signal
- power dissipation
- ultra low power
- vlsi circuits
- power reduction
- high power
- image sensor
- delay insensitive
- cmos image sensor
- real time
- nm technology
- signal processing
- frame rate
- wireless transmission
- signal processor
- analog to digital converter
- low complexity