Partitioning Sequential Circuits for Logic Optimization.
Sujit DeyFranc BrglezGershon KedemPublished in: ICCD (1991)
Keyphrases
- logic synthesis
- delay insensitive
- digital circuits
- asynchronous circuits
- optimization algorithm
- high speed
- logic programming
- logic circuits
- optimization problems
- global optimization
- modal logic
- classical logic
- multi valued
- optimization model
- constrained optimization
- chip design
- database
- truth table
- shift register
- partitioning algorithm
- discrete optimization
- low power
- objective function
- database systems
- neural network