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A 12-Bit 1.6, 3.2, and 6.4 GS/s 4-b/Cycle Time-Interleaved SAR ADC With Dual Reference Shifting and Interpolation.
Jae-Won Nam
Mohsen Hassanpourghadi
Aoyang Zhang
Mike Shuo-Wei Chen
Published in:
IEEE J. Solid State Circuits (2018)
Keyphrases
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synthetic aperture radar
analog to digital converter
primal dual
motion estimation
low cost
maximum likelihood
sar images
linear interpolation
image processing
learning environment
high resolution
denoising
parameter estimation
image reconstruction
interpolation methods