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A high-speed and high-performance full adder cell based on 32-nm CNFET technology for low voltages.
Yavar Safaei Mehrabani
Zahra Zareei
Ahmad Khademzadeh
Published in:
Int. J. High Perform. Syst. Archit. (2013)
Keyphrases
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high speed
low power
cost effective
data processing
low power consumption
cmos technology
nm technology
rapid development
logic circuits
case study
computer systems
st century
metal oxide
e learning
power dissipation
scientific computing
data flow
key technologies
personal computer
wireless networks