Network flow-based simultaneous retiming and slack budgeting for low power design.

Bei Yu Sheqin Dong Yuchun Ma Tao Lin Yu Wang Song Chen Satoshi Goto

Published in: ASP-DAC (2011)

Keyphrases

low power
network flow
single chip
power consumption
high speed
low power consumption
low cost
logic circuits
gate array
digital signal processing
vlsi architecture
cmos technology
power dissipation
mixed signal
power reduction
cmos image sensor
nm technology
signal processing
real time
minimum cost
ultra low power