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Interleaving Test Algorithm for Subthreshold Leakage-Current Defects in DRAM Considering the Equal Bit Line Stress.
Hyoyoung Shin
Youngkyu Park
Gihwa Lee
Jungsik Park
Sungho Kang
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2014)
Keyphrases
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