An FPGA chip identification generator using configurable ring oscillator.

Haile Yu Philip Heng Wai Leong Qiang Xu

Published in: FPT (2010)

Keyphrases

high speed
low cost
single chip
programmable logic
real time
hardware implementation
field programmable gate array
low power
low power consumption
neural network
signal processing
high density
efficient implementation
software implementation
reconfigurable hardware