Work-in-Progress: High-Performance Systolic Hardware Accelerator for RBLWE-based Post-Quantum Cryptography.
Tianyou BaoJosé Luis ImañaPengzhou HeJiafeng XiePublished in: CODES+ISSS (2022)
Keyphrases
- field programmable gate array
- low cost
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- compute intensive
- parallel implementation
- low power consumption
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- low latency
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- graphics processing units
- signal processor
- quantum computation
- low power
- cellular automata
- computing systems
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- single chip
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- quantum computing
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- computer systems
- embedded systems
- computing platform
- image processing
- data sets
- information systems
- systolic array
- quantum inspired
- digital signal processor
- operating system
- logic circuits
- parallel architectures
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- parallel computing