A parallel 32×32 time-to-digital converter array fabricated in a 130 nm imaging CMOS technology.
Marek GersbachYuki MaruyamaE. LabonneJ. RichardsonRichard WalkerLindsay GrantRobert K. HendersonFausto BorghettiDavid StoppaEdoardo CharbonPublished in: ESSCIRC (2009)
Keyphrases
- cmos technology
- image sensor
- analog to digital converter
- low voltage
- mixed signal
- parallel processing
- low power
- imaging systems
- random access memory
- charge coupled device
- video camera
- dynamic range
- spl times
- cmos image sensor
- image processing algorithms
- single chip
- silicon on insulator
- motion blur
- hardware and software
- digital camera
- power consumption
- focal plane
- high speed
- data conversion
- low cost
- solid state
- metal oxide semiconductor
- real time
- image processing
- image analysis
- computer vision
- shared memory
- video sequences
- multimedia
- power dissipation
- computing systems
- embedded dram