Sub-threshold CMOS circuits reliability assessment using simulated fault injection based on simulator commands.
Sergiu NimaraAlexandru AmaricaiMircea PopaPublished in: SACI (2015)
Keyphrases
- reliability assessment
- fault injection
- analog vlsi
- delay insensitive
- circuit design
- high speed
- simulation model
- java card
- vlsi circuits
- bp neural network model
- cmos technology
- power consumption
- power system
- fault model
- low power
- low voltage
- power dissipation
- floating gate
- random access memory
- focal plane
- asynchronous circuits
- virtual machine
- data center
- smart card
- chip design
- real robot
- computational intelligence
- mixed signal
- artificial intelligence
- countermeasures