Duty-Cycle Correction For A Super-Wide Frequency Range from 10MHz to 1.2GHz.

Wei Chu Wei-Hao Chen Shi-Yu Huang

Published in: ICCD (2020)

Keyphrases

duty cycle
clock frequency
power consumption
high end
high speed
parallel architecture
field programmable gate array
massively parallel
cmos technology
parallel computing
low power
data access
real time
information systems
embedded systems
energy efficiency