Design and analysis of low-power high-speed shared charge reset technique based dynamic latch comparator.
Vijay SavaniN. M. DevashrayeePublished in: Microelectron. J. (2018)
Keyphrases
- low power
- high speed
- single chip
- power consumption
- low power consumption
- low cost
- vlsi architecture
- logic circuits
- digital signal processing
- power reduction
- gate array
- power dissipation
- high power
- mixed signal
- cmos technology
- real time
- wireless transmission
- image sensor
- vlsi circuits
- design process
- nm technology
- ultra low power
- delay insensitive