Field Programmable Gate Array based floating point hardware design of recursive k-means clustering algorithm for Radial Basis Function Neural Network.
S. P. Joy Vasantha RaniP. KanagasabapathyL. SuganthiPublished in: Int. J. Intell. Syst. Technol. Appl. (2009)
Keyphrases
- floating point
- field programmable gate array
- hardware design
- radial basis function neural network
- rbfnn
- hardware implementation
- pattern classification
- parallel computing
- embedded systems
- image processing algorithms
- fixed point
- radial basis function
- programmable logic
- multilayer perceptron
- rbf neural network
- graphics processing units
- sensitivity analysis
- computing systems
- instruction set
- back propagation
- fpga technology
- hardware software
- clustering algorithm
- hidden layer
- neural network
- massively parallel
- rbf network
- function approximation
- image processing
- fpga device
- floating point arithmetic
- low cost
- machine learning
- hybrid algorithm
- efficient implementation
- signal processing
- hardware description language