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Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture.
Tsai-Kan Chien
Lih-Yih Chiou
Chieh-Wen Cheng
Shyh-Shyuan Sheu
Pei-Hua Wang
Ming-Jinn Tsai
Chih-I Wu
Published in:
APCCAS (2016)
Keyphrases
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memory access
real time
parallel implementation
main memory
low energy
data structure
data transfer
memory space
database
hardware implementation
distributed architecture
memory management
memory hierarchy
level parallelism
memory bandwidth