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Optimal utilization of adjustable delay clock buffers for timing correction in designs with multiple power modes.

Juyeon KimDeokjin JooTaewhan Kim
Published in: Integr. (2016)
Keyphrases
  • power consumption
  • worst case
  • high speed
  • real time
  • dynamic programming
  • optimal control
  • optimal design
  • power dissipation