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A low-leakage single-bitline 9T SRAM cell with read-disturbance removal and high writability for low-power biomedical applications.
Erfan Abbasian
Morteza Gholipour
Published in:
Int. J. Circuit Theory Appl. (2022)
Keyphrases
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low power
low power consumption
power consumption
low cost
high speed
single chip
small size
high power
logic circuits
wireless transmission
power reduction
vlsi architecture
vlsi circuits
digital signal processing
power saving
power management
real time
signal processor
delay insensitive
cmos technology
image sensor