A Reconfigurable On-die Traffic Generator in 45nm CMOS for a 48 iA-32 Core Network-on-Chip.
Praveen SalihundamMohammed Asadullah KhanShailendra JainYatin HoskoteSatish YadaShasi KumarVasantha ErraguntlaSriram R. VangalNitin BorkarPublished in: VLSI Design (2012)