Robustly Scan-Testable CMOS Sequential Circuits.
Bong-Hee ParkPremachandran R. MenonPublished in: ITC (1991)
Keyphrases
- analog vlsi
- delay insensitive
- circuit design
- high speed
- vlsi circuits
- cmos technology
- power dissipation
- floating gate
- chip design
- focal plane
- low power
- low voltage
- random access memory
- power consumption
- neural network
- asynchronous circuits
- mixed signal
- scan data
- real time
- digital circuits
- design considerations
- parallel processing
- shift register