Soft Clock Skew Scheduling for Variation-Tolerant Signal Processing Circuits: A Case Study of Viterbi Decoders.
Yang LiuTong ZhangJiang HuPublished in: ISQED (2007)
Keyphrases
- signal processing
- high speed
- power reduction
- power consumption
- scheduling algorithm
- hidden markov models
- image processing
- case study
- scheduling problem
- decoding algorithm
- fourier transform
- hard constraints
- test bed
- dynamic scheduling
- duty cycle
- power dissipation
- hardware implementation
- resource constraints
- resource allocation
- round robin
- low power
- filter bank
- tunnel diode
- viterbi algorithm
- signal analysis
- analog circuits
- logic synthesis
- lower bound