Maximizing pin alignment in semi-custom chip circuit layout.
Peter WidmayerLin S. WooC. K. WongPublished in: Integr. (1988)
Keyphrases
- analog vlsi
- high speed
- circuit design
- evolvable hardware
- chip design
- cmos technology
- power dissipation
- micron cmos
- domain specific
- low power
- high density
- phase locked loop
- image alignment
- low cost
- analog circuits
- power consumption
- digital circuits
- physical design
- vlsi implementation
- layout design
- application specific
- dynamic time warping
- single chip
- printed circuit boards
- design methodology
- logic circuits
- programmable logic
- cf loadingtexthtml
- real time