Design and failure analysis of logic-compatible multilevel gain-cell-based dram for fault-tolerant VLSI systems.
Pascal Andreas MeinerzhagenOnur AndiçJürg TreichlerAndreas Peter BurgPublished in: ACM Great Lakes Symposium on VLSI (2011)
Keyphrases
- fault tolerant
- distributed systems
- safety critical
- fault tolerance
- high assurance
- knowledge based systems
- load balancing
- complex systems
- state machine
- design process
- support systems
- chip design
- management system
- main memory
- intelligent systems
- embedded systems
- digital circuits
- low cost
- interconnection networks
- fault isolation