VERILAT: verification using logic augmentation and transformations.
Dhiraj K. PradhanDebjyoti PaulMitrajit ChatterjeePublished in: ICCAD (1996)
Keyphrases
- asynchronous circuits
- verification method
- model checking
- model checker
- bounded model checking
- multi valued
- logic programming
- predicate logic
- linear time temporal logic
- modal logic
- face verification
- signature verification
- data sets
- delay insensitive
- classical logic
- nonmonotonic logics
- formal analysis
- formal theory
- temporal logic
- database
- probabilistic logic
- epistemic logic
- formal methods
- genetic algorithm
- neural network