Sign in
Low-Voltage 0, 25 µm CMOS Improved Power Adaptive Issue Queue for Embedded Microprocessors.
Brian W. Curran
Mary Gifaldi
Jason Martin
Alper Buyuktosunoglu
Martin Margala
David H. Albonesi
Published in:
VLSI-SOC (2001)
Keyphrases
</>
low voltage
power management
power consumption
cmos technology
design considerations
power line
random access memory
reactive power
low power
queue length
embedded systems
parallel processing
energy consumption
low cost
data center
steady state
single chip