FMER: A hybrid configuration memory error recovery scheme for highly reliable FPGA SoCs.

Dimitris Agiakatsikas Ediz Çetin Oliver Diessel

Published in: FPL (2016)

Keyphrases

highly reliable
error recovery
network coding
error detection
high speed
text understanding
error correction
packet loss
plan generation
artificial intelligence
knowledge representation
end to end
video transmission
natural language understanding
read write