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A shorted global clock design for multi-GHz 3D stacked chips.
Liang-Teck Pang
Phillip J. Restle
Matthew R. Wordeman
Joel A. Silberman
Robert L. Franch
Gary W. Maier
Published in:
VLSIC (2012)
Keyphrases
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high speed
expert systems
user interface
design process
engineering design
design decisions
neural network
knowledge base
case study
design methodology