Low power scheduling in high-level synthesis using dual-Vth library.
Samaneh GhandaliBijan AlizadehZainalabedin NavabiPublished in: ISQED (2015)
Keyphrases
- low power
- high level synthesis
- power consumption
- low cost
- high speed
- single chip
- high power
- scheduling problem
- parallel architecture
- scheduling algorithm
- wireless transmission
- vlsi architecture
- digital signal processing
- vlsi circuits
- logic circuits
- low power consumption
- real time
- mixed signal
- image sensor
- power reduction
- gate array
- parallel implementation
- signal processing
- cmos technology
- energy efficiency
- parallel machines