Circuit for Reversible Quantum Multiplier Based on Binary Tree Optimizing Ancilla and Garbage Bits.
Saurabh KotiyalHimanshu ThapliyalNagarajan RanganathanPublished in: VLSI Design (2014)
Keyphrases
- binary tree
- logic circuits
- quadtree
- high speed
- hierarchical structure
- logic synthesis
- markov chain
- tree representation
- multiclass svm
- circuit design
- quantum computing
- predictive coding
- garbage collection
- cellular automata
- floating point
- image representation
- hardware implementation
- analog circuits
- management system
- quantum inspired
- quantum computation
- computer vision
- type ii
- binary trees
- electronic circuits
- multiresolution
- data structure
- multiscale