Sign in

A single stage decimator architecture for sigma-delta demodulators using Laguerre filters.

Saman S. AbeysekeraXue Yao
Published in: ISCAS (2) (2001)
Keyphrases
  • sigma delta
  • single stage
  • multistage
  • high order
  • stochastic optimization
  • real time
  • matlab simulink
  • higher order
  • image sensor
  • max min
  • edge detection
  • petri net
  • lead time
  • lot sizing
  • transportation problem