Calculating Worst-Case Gate Delays Due to Dominant Capacitance Coupling.
Florentin DartuLawrence T. PileggiPublished in: DAC (1997)
Keyphrases
- worst case
- high speed
- upper bound
- average case
- lower bound
- greedy algorithm
- error bounds
- np hard
- low power
- approximation algorithms
- high frequency
- computational complexity
- space complexity
- transmission line
- information systems
- unit length
- worst case scenario
- running times
- worst case analysis
- nano scale
- multi class
- expert systems
- multi agent
- multiscale
- image sequences
- clustering algorithm
- artificial intelligence
- machine learning
- data sets
- real time