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A 2.3 mW Multi-Frequency Clock Generator with -137 dBc/Hz Phase Noise VCO in 180 nm Digital CMOS Technology.
Jagdeep Kaur Sahani
Anil Singh
Alpana Agarwal
Published in:
J. Circuits Syst. Comput. (2020)
Keyphrases
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cmos technology
power consumption
low power
mixed signal
clock frequency
power dissipation
spl times
low voltage
high speed
power management
low frequency
high frequency
cmos image sensor
parallel processing
silicon on insulator
image sensor
pattern recognition